144 pins - SIDSA MACTSP 0234 56524A - R2G6632
SIDSA's MACtsp multimedia engine is a high performance ARM7TDMITM based single-chip which requires very few external components (SRAM, FLASH and Smart Card Driver). Indeed several Conditional Access Systems (CAS) can be quickly implemented on the same engine using our associated software development tools and reference designs.
48 pins - M29W160DB - 16 Mbit (2Mb x8 or 1Mb x16, Boot Block)
3V Supply Flash Memory. The M29W160D is a 16 Mbit (2Mb x8 or 1Mb x16) non-volatile memory that can be read, erased and reprogrammed. These operations can be performed using a single low voltage (2.7 to 3.6V) supply. On power-up the memory defaults to its Read mode where it can be read in the same way as a ROM or EPROM. The memory is divided into blocks that can be erased independently so it is possible to preserve valid data while old data is erased. Each block can be protected independently to prevent accidental Program or Erase commands from modifying the memory. Program and Erase commands are written to the Command Interface of the memory. An on-chip Program/Erase Controller simplifies the process of programming or erasing the memory by taking care of all of the special operations that are required to update the memory contents. The end of a program or erase operation can be detected and any error conditions identified. The command set required to control the memory is consistent with JEDEC standards. The blocks in the memory are asymmetrically arranged. The first or last 64 Kbytes have been divided into four additional blocks. The 16 Kbyte Boot Block can be used for small initialization code to start the microprocessor, the two 8 Kbyte Parameter Blocks can be used for parameter storage and the remaining 32K is a small Main Block where the application may be stored. Chip Enable, Output Enable and Write Enable signals control the bus operation of the memory. They allow simple connection to most microprocessors, often without additional logic. The memory is offered in SO44, TSOP48 (12 x 20mm) and TFBGA48 (0.8mm pitch) packages. The memory is supplied with all the bits erased set to ’1’).
44 pins - Xilinx - XC9536XL
The XC9536XL is a 3.3V CPLD targeted for high-performance, low-voltage applications in leading-edge communications and computing systems. It is comprised of two 54V18 Function Blocks, providing 800 usable gates with propagation delays of 5 ns.
IC4
32 pins - B002C - 8174S
IC5
44 pins - Alliance - AS7C34098-15TC is a 3.3V 256K x 16 CMOS SRAM, access time 15ns made by Alliance Semiconductor Corporation